This webinar presents case studies demonstrating the use of 3D optical profilers for improving yield, identifying root cause failure, and driving next-generation device development from bare wafer to final packaged device.
Viewers can expect to gain new insight into bare wafer roughness control and CMP monitoring and optimization as well as the use of direct measurement of topography to assess die flatness and identify the source of RDL, bump, recess, and overlay defects.
Designed for Process, CMP, and Metrology & Quality Engineers as well as R&D scientists working in semiconductor, micro-electronics, display technology, printed electronics, and telecoms industries, we cover requirements and metrology needs for:
This webinar was presented on December 17, 2018.
Find out more about the technology featured in this webinar or our other solutions for semiconductor process control:
Samuel Lesko, Ph.D.
Dir. of Technology and Apps Development for Tribology, Stylus & Optical Profilers, Bruker